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Qore Programming Language
0.8.3
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00001 /* -*- mode: c++; indent-tabs-mode: nil -*- */ 00002 #ifndef _QORE_MACHINE_MACROS_H 00003 00004 #define _QORE_MACHINE_MACROS_H 00005 00006 // no atomic support or stack guard for 64-bit sparc yet 00007 #if !defined(__sparcv9) 00008 00009 #define STACK_DIRECTION_DOWN 1 00010 00011 #ifdef __GNUC__ 00012 00013 #define HAVE_ATOMIC_MACROS 00014 00015 // borrowed from boost 00016 inline int compare_and_swap(int *dest_, int compare_, int swap_) { 00017 __asm__ __volatile__( "cas %0, %2, %1" 00018 : "+m" (*dest_), "+r" (swap_) 00019 : "r" (compare_) 00020 : "memory" ); 00021 00022 return swap_; 00023 } 00024 00025 inline int atomic_fetch_and_add(int * pw, int dv) { 00026 for( ;; ) { 00027 int r = *pw; 00028 00029 if (__builtin_expect((compare_and_swap(pw, r, r + dv) == r), 1)) { 00030 return r; 00031 } 00032 } 00033 } 00034 00035 static inline int atomic_dec(int *pw) { 00036 return !atomic_fetch_and_add(pw, -1); 00037 } 00038 00039 static inline void atomic_inc(int *pw) { 00040 atomic_fetch_and_add(pw, 1); 00041 } 00042 00043 #define HAVE_CHECK_STACK_POS 00044 00045 static inline size_t get_stack_pos() { 00046 size_t addr; 00047 __asm__("mov %%sp,%0" : "=r" (addr) ); 00048 return addr; 00049 } 00050 00051 #endif 00052 00053 #ifdef __SUNPRO_CC 00054 #define HAVE_ATOMIC_MACROS 00055 00056 // routines are implemented in assembler 00057 extern "C" int atomic_dec(int *pw); 00058 extern "C" void atomic_inc(int *pw); 00059 00060 #define HAVE_CHECK_STACK_POS 00061 00062 extern "C" size_t get_stack_pos(); 00063 00064 #endif 00065 00066 #endif 00067 00068 #endif